41 lines
1.1 KiB
Plaintext
41 lines
1.1 KiB
Plaintext
/*
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* Copyright (c) 2014 ETH Zurich. All rights reserved.
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*
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* This file is distributed under the terms in the attached LICENSE file.
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* If you do not find this file, copies can be found by writing to:
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* ETH Zurich D-INFK, Universitaetstrasse 6, CH-8092 Zurich. Attn: Systems Group.
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*/
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/*
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* xeon_phi_serial.dev
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*
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* description: register definitions for the Xeon Phi software scratch registers
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*
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* Base: the base of the sbox
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*/
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device xeon_phi_serial lsbfirst ( addr base ) "Intel Xeon Phi Software Scratch Registers" {
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constants ctrl_values width(8) "Constants" {
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reset = 0x0;
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data = 0x7A;
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};
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// currently scratch 15 register
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register data rw addr(base, 0xAB5C) "" {
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value0 8 "Datavalue to send";
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value1 8 "Datavalue to send";
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value2 8 "Datavalue to send";
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value3 8 "Datavalue to send";
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};
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// currently scratch 8 register
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register ctrl rw addr(base, 0xAB40) "" {
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value0 8 "Datavalue to send";
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value1 8 "Datavalue to send";
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value2 8 "Datavalue to send";
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value3 8 "Datavalue to send";
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};
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}; |