34 lines
775 B
Plaintext
34 lines
775 B
Plaintext
module DRAM {
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input memory (0 bits 40) GDDR0
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output memory (0 bits 40) RAMOUT
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GDDR0 accepts [(0x000000000 to 0x0fedfffff)]
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memory (0 bits 40) DRAMMAP
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DRAMMAP maps [
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(0x000000000 to 0x0fedfffff) to RAMOUT at (0x000000000 to 0x0fedfffff)
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]
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}
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module SOCKET {
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instance RAM[1 to 2; 10 to 11] of DRAM
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memory (0 bits 40) LOCAL
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LOCAL accepts [(0x000000000 to 0x0fedfffff)]
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memory (0 bits 40) LOCAL_SRC
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forall x in (1 to 2, 10 to 11) {
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forall y in (10 to 11) {
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RAM[x; y] instantiates DRAM
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RAM[x; y] binds [
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RAMOUT to LOCAL
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]
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LOCAL_SRC maps [
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(0x1000 to 0x2000) to RAM[x; y].GDDR0 at (0x1000 to 0x2000)
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]
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}
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}
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}
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