471 lines
16 KiB
Plaintext
471 lines
16 KiB
Plaintext
/*
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* Copyright (c) 2014 ETH Zurich. All rights reserved.
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*
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* This file is distributed under the terms in the attached LICENSE file.
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* If you do not find this file, copies can be found by writing to:
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* ETH Zurich D-INFK, Universitaetstrasse 6, CH-8092 Zurich. Attn: Systems Group.
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*/
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/*
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* xeon_phi_sensors.dev
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*
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* description: register definitions for the Xeon Phi onboard sensors
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*/
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device xeon_phi_sensors lsbfirst ( addr base ) "Intel Xeon Phi Sensors" {
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: GRAP_PWRDG, HOT_RESET
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* Register Access: TRM
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*/
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register thermal_status rw addr(base, 0x1018) "Status and Log info for all the thermal interrupts" {
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thermal_monitor_status 1 "Set whenever the current die temp exceeds the thermal monitor control temperature";
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thermal_monitor_log 1 "Sticky version of Thermal_Monitor_Status, cleared by s/w or by reset";
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out_of_spec_status 1 "Set whenever the current die temp exceeds the Out of Spec temperature; is sticky";
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out_of_spec_log 1 "Sticky version of Out_Of_Spec_Status ";
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thermal_threshold1_status 1 "Set whenever the current die temp exceeds the software programmed thermal threshold";
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thermal_threshold1_log 1 "Sticky version of Thermal_Threshold1_Status, cleared by s/w or by reset";
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thermal_threshold2_status 1 "Set whenever the current die temp exceeds the software programmed thermal threshold2";
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thermal_threshold2_log 1 "Sticky version of Thermal_Threshold2_Status, cleared by s/w or by reset";
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fan_monitor_status 1 "Indication if there was an error/fail condition with the Off-chip Fan";
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fan_monitor_log 1 "Sticky version of Fan_Monitor_Status, cleared by s/w or by reset";
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system_hot_status 1 "Indication if any other device on the MIC Card is hot";
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system_hot_log 1 "Sticky version of System_Hot_Status, cleared by s/w or by reset";
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_ 20 "Reserved";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET, HOT_RESET
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* Register Access: TRM
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*/
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register thermal_irq_enable rw addr(base, 0x101C) "Register that controls the interrupt response to thermal events" {
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high_temp 1 "enables/disables the s/w programmed HIGH temp interrupt";
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low_temp 1 "enables/disables the s/w programmed LOW temp interrupt";
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out_of_spec 1 "enables/disables the Out of Spec Temp interrupt";
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fan_monitor 1 "enables/disables the interrupt from Fan Control Unit";
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system_monitor 1 "enables/disables the system hot interrupts";
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mclk_ratio 1 "enables/disables the mclk ratio interrupts";
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alert 1 "enables/disables the ALERT# interrupts";
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gpuhot 1 "enables/disables the GPUHOT# interrupts";
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pwralert 1 "enables/disables the PWRALERT# interrupt";
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_ 1 "Reserved";
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sw_threshold1_temp 10 "Software Programmable Thermal Threshold #1";
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sw_threshold1_enable 1 "enables/disables the sw threshold #1 interrupts";
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sw_threshold2_temp 10 "Software Programmable Thermal Threshold #2";
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sw_threshold2_enable 1 "enables/disables the sw threshold #2 interrupts";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET, HOT_RESET
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* Register Access: TRM
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*/
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register micro_controller_fan_status rw addr(base, 0x1020) "Upto data Status information from the Fan microcontroller" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET, HOT_RESET
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* Register Access: TRM
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*/
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register status_fan1 rw addr(base, 0x1024) "32 bit Status of Fan #1" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET, HOT_RESET
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* Register Access: TRM
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*/
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register status_fan2 rw addr(base, 0x1028) "32 bit Status of Fan #2" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: GRPA_PWRDG, HOT_RESET
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* Register Access: TRM
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*/
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register speed_override_fan rw addr(base, 0x102C) "Override of fan speed" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET, HOT_RESET
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* Register Access: TRM
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*/
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register board_temp1 rw addr(base, 0x1030) "Temperature from Sensors 1 and 2 on LRB Card" {
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value 32 "Value";
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}
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET, HOT_RESET
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* Register Access: TRM
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*/
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register board_temp2 rw addr(base, 0x1034) "Temperature from Sensors 3 and 4 on LRB Card" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET, HOT_RESET
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* Register Access: TRM
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*/
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register board_voltage rw addr(base, 0x1038) "Digitized value of Voltage sense input to LRB" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register current_die_temp0 rw addr(base, 0x103C) "Consists of Current Die Temperatures of sensors 0 thru 2" {
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sensor0 10 "current temperature of sensor 0";
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sensor1 10 "current temperature of sensor 1";
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sensor2 10 "current temperature of sensor 2";
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_ 2 "Reserved";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register current_die_temp1 rw addr(base, 0x1040) "Consists of Current Die Temperatures of sensors 3 thru 5" {
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sensor3 10 "current temperature of sensor 3";
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sensor4 10 "current temperature of sensor 4";
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sensor5 10 "current temperature of sensor 5";
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_ 2 "Reserved";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register current_die_temp2 rw addr(base, 0x1044) "Consists of Current Die Temperatures of sensors 6 thru 8" {
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sensor6 10 "current temperature of sensor 6";
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sensor7 10 "current temperature of sensor 7";
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sensor8 10 "current temperature of sensor 8";
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_ 2 "Reserved";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: GRPA_PWRDG
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* Register Access: TRM
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*/
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register max_die_temp0 rw addr(base, 0x1048) "Consists of Maximum Die Temperatures of sensors 0 thru 2" {
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sensor0 10 "maximum temperature of sensor 0";
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sensor1 10 "maximum temperature of sensor 1";
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sensor2 10 "maximum temperature of sensor 2";
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_ 2 "Reserved";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: GRPA_PWRDG
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* Register Access: TRM
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*/
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register max_die_temp1 rw addr(base, 0x104C) "Consists of Maximum Die Temperatures of sensors 3 thru 5" {
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sensor3 10 "maximum temperature of sensor 3";
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sensor4 10 "maximum temperature of sensor 4";
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sensor5 10 "maximum temperature of sensor 5";
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_ 2 "Reserved";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: GRPA_PWRDG
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* Register Access: TRM
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*/
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register max_die_temp2 rw addr(base, 0x1050) "Consists of Maximum Die Temperatures of sensors 6 thru 8" {
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sensor6 10 "maximum temperature of sensor 6";
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sensor7 10 "maximum temperature of sensor 7";
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sensor8 10 "maximum temperature of sensor 8";
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_ 2 "Reserved";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: GRPA_PWRDG
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* Register Access: TRM
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*/
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register min_die_temp0 rw addr(base, 0x1054) "Consists of Minimum Die Temperatures of sensors 0 thru 2" {
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sensor0 10 "minimum temperature of sensor 0";
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sensor1 10 "minimum temperature of sensor 1";
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sensor2 10 "minimum temperature of sensor 2";
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_ 2 "Reserved";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: GRPA_PWRDG
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* Register Access: TRM
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*/
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register min_die_temp1 rw addr(base, 0x1058) "Consists of Minimum Die Temperatures of sensors 3 thru 5" {
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sensor3 10 "minimum temperature of sensor 3";
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sensor4 10 "minimum temperature of sensor 4";
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sensor5 10 "minimum temperature of sensor 5";
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_ 2 "Reserved";;
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: GRPA_PWRDG
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* Register Access: TRM
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*/
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register min_die_temp2 rw addr(base, 0x105C) "Consists of Minimum Die Temperatures of sensors 6 thru 8" {
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sensor6 10 "minimum temperature of sensor 6";
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sensor7 10 "minimum temperature of sensor 7";
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sensor8 10 "minimum temperature of sensor 8";
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_ 2 "Reserved";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: GRPA_PWRDG
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* Register Access: TRM
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*/
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register min_die_temp2 rw addr(base, 0x105C) "Consists of Minimum Die Temperatures of sensors 6 thru 8" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET, HOT_RESET
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* Register Access: TRM
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*/
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register thermal_status2 rw addr(base, 0x1080) "Thermal Status for LRB2" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET, HOT_RESET
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* Register Access: TRM
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*/
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register thermal_status_irq rw addr(base, 0x107C) "Status and Log info for lrb2 new thermal interrupts" {
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mclk_ratio_status 1 "Set whenever MCLK Ratio Changes. Cleared by SW writing.";
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mclk_ratio_log 1 "A sticky version of MCLK_Ratio_Status";
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alert_status 1 "Set whenever ALERT# pin is asserted. Cleared by SW writing.";
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alert_log 1 "A sticky version of Alert_Status, cleared by s/w or by reset";
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gpuhot_status 1 "Reflects the real-time value of the GPUHOT# pin (synchronized to SCLK domain).";
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gpuhot_log 1 "Set on the assertion edge of GPUHOT# and remains set until software clears it by doing a write.";
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pwralert_status 1 "Reflects the real-time value of the PWRALERT# pin (synchronized to SCLK domain).;
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pwralert_log 1 "Set on the assertion edge of PWRALERT# and remains set until software clears it by doing a write."
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_ 23 "Reserved";
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etc_freeze 1 "freeze the increment of elapsed-time counter";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register ext_temp_settings0 rw addr(base, 0x1090) "External Thermal Sensor Setting - Sensor #0" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register ext_temp_settings1 rw addr(base, 0x1094) "External Thermal Sensor Setting - Sensor #1" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register ext_temp_settings2 rw addr(base, 0x1098) "External Thermal Sensor Setting - Sensor #2" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register ext_temp_settings3 rw addr(base, 0x109C) "External Thermal Sensor Setting - Sensor #3" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register ext_temp_settings4 rw addr(base, 0x10A0) "External Thermal Sensor Setting - Sensor #4" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register ext_temp_settings5 rw addr(base, 0x10A4) "External Thermal Sensor Setting - Sensor #5" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register ext_controlparams0 rw addr(base, 0x10A8) "External Thermal Sensor Parameters - Sensor #0" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register ext_controlparams1 rw addr(base, 0x10AC) "External Thermal Sensor Parameters - Sensor #1" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register ext_controlparams2 rw addr(base, 0x10B0) "External Thermal Sensor Parameters - Sensor #2" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register ext_controlparams3 rw addr(base, 0x10B4) "External Thermal Sensor Parameters - Sensor #3" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register ext_controlparams4 rw addr(base, 0x10B8) "External Thermal Sensor Parameters - Sensor #4" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register ext_controlparams5 rw addr(base, 0x10BC) "External Thermal Sensor Parameters - Sensor #5" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register ext_temp_status0 rw addr(base, 0x10C0) "External Thermal Sensor Status - Sensor #0 ~ #2" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register ext_temp_status1 rw addr(base, 0x10C4) "External Thermal Sensor Status - Sensor #3 ~ #5" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register int_fan_status rw addr(base, 0x10C8) "Internal Thermal Sensor Status" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register int_fan_control0 rw addr(base, 0x10CC) "Internal Thermal Sensor Setting/Parameters and FCU Configuration - 0" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register int_fan_control1 rw addr(base, 0x10D0) "Internal Thermal Sensor Setting/Parameters and FCU Configuration - 1" {
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value 32 "Value";
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};
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/*
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* Protection Level: Ring 0
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* Visibility: Host / Coprocessor
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* Reset Domain: CSR_RESET
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* Register Access: TRM
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*/
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register int_fan_control2 rw addr(base, 0x10D4) "Internal Thermal Sensor Setting/Parameters and FCU Configuration - 2" {
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value 32 "Value";
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};
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}; |