92 lines
4.6 KiB
Plaintext
92 lines
4.6 KiB
Plaintext
/*
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* Copyright (c) 2013 ETH Zurich. All rights reserved.
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*
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* This file is distributed under the terms in the attached LICENSE file.
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* If you do not find this file, copies can be found by writing to:
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* ETH Zurich D-INFK, CAB F.78, Universitaetstrasse 6, CH-8092 Zurich,
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* Attn: Systems Group.
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*/
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/*
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* omap44xx_icr_mpu.dev
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*
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* DESCRIPTION:
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*
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* NOTE: This file has been automatically generated based on the
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* XML files extracted from the TI RDT v1.0.0.4p Tool.
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* Download from here: http://www.ti.com/product/omap4460
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* This means that the file might not be optimal in terms of naming
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* conventions for constants and registers (duplicated
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* namespaces in register and device name etc.).
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* Also, because of the underlying structure from the original XML
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* it's possible that some constants appear multiple times (if they
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* have slightly different descriptions for example).
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*
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* You want to clean that up before using the files for the first time!
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*/
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device omap44xx_icr_mpu msbfirst ( addr base ) "" {
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register icr_revision ro addr(base, 0x0) "This register contains the IP revision code." type(uint32);
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constants idlemode_status width(2) "" {
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IDLEMODE_0 = 0 "Force-idle";
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IDLEMODE_1 = 1 "No-idle";
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IDLEMODE_3 = 3 "Reserved";
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IDLEMODE_2 = 2 "Smart-idle";
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};
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register sys_config addr(base, 0x10) "This register allows controlling various parameters of the OCP interface." {
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_ 27 mbz;
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idlemode 2 rw type(idlemode_status) "Slave interface power management, req/ack control";
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_ 1 mbz;
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softreset 1 rw "Software reset. Set this bit to 1 to trigger a module reset. The bit is automatically reset by the hardware. During reads, it always return 0. 0: Normal mode 1: The module is reset";
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autoidle 1 rw "Internal OCP clock gating 0: OCP clock is free running 1: Automatic OCP clock gating strategy is applied based on the OCP interface activity";
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};
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constants resetdone_status width(1) "" {
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RESETDONE_1_r = 1 "Reset completed";
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RESETDONE_0_r = 0 "Internal module reset in ongoing";
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};
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register sys_status addr(base, 0x14) "This register provides status information about the module, excluding the interrupt status information." {
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_ 31 mbz;
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resetdone 1 ro type(resetdone_status) "Internal reset monitoring 0: Internal module reset ongoing 1: Reset completed";
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};
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constants flag_set_status width(1) "" {
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FLAG_SET_0_w = 0 "Received command (Rx path) status bit unchanged";
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FLAG_SET_1_w = 1 "Received command (Rx path) status bit is reset";
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FLAG_SET_1_r = 1 "Received command (Rx path) is true ('pending')";
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FLAG_SET_0_r = 0 "Received command (Rx path) false";
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};
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register m_irq_status addr(base, 0x18) "The interrupt status register regroups all the status of the module internal events that can generate an interrupt - Write 1 to a given bit resets this bit." {
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_ 30 mbz;
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flag_set 1 rw type(flag_set_status) "Flag has been set inG_ICR register.";
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flag_reset 1 rw type(flag_set_status) "Flag has been reset inM_ICR register.";
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};
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register g_irq_status addr(base, 0x1C) "The interrupt status register regroups all the status of the module internal events that can generate an interrupt - Write 1 to a given bit resets this bit." {
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_ 30 mbz;
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flag_set 1 rw1c type(flag_set_status) "Flag has been set inM_ICR register.";
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flag_reset 1 rw1c type(flag_set_status) "Flag has been reset inG_ICR register.";
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};
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register m_icr rw1c addr(base, 0x20) "Flags are used to notify an event to the other subsystem. The meaning of each flag is software dependent." type(uint32);
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register g_icr rw addr(base, 0x24) "Flags are used to notify an event to the other subsystem. The meaning of each flag is software dependent." type(uint32);
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register m_ctl addr(base, 0x28) "Enables interrupts to subsystems." {
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_ 30 mbz;
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g_icr_inten 1 ro "Enable interrupt to MPU-S 0: No interrupt is generated 1: An interrupt is generated when Modem-S sets a flag to MPU-S";
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m_icr_inten 1 ro "Enable interrupt to MPU-S 0: No interrupt is generated 1: An interrupt is generated when Modem-S resets a flag set by MPU-S";
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};
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register g_ctl addr(base, 0x2C) "Enables interrupts to subsystems." {
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_ 30 mbz;
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m_icr_inten 1 rw "Enable interrupt to Modem-S 0: No interrupt is generated 1: An interrupt is generated when MPU-S sets a flag to Modem-S";
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g_icr_inten 1 rw "Enable interrupt to Modem-S 0: No interrupt is generated 1: An interrupt is generated when MPU-S resets a flag set by Modem-S";
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};
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}; |