98 lines
4.2 KiB
Plaintext
98 lines
4.2 KiB
Plaintext
/*
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* Copyright (c) 2013 ETH Zurich. All rights reserved.
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*
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* This file is distributed under the terms in the attached LICENSE file.
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* If you do not find this file, copies can be found by writing to:
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* ETH Zurich D-INFK, CAB F.78, Universitaetstrasse 6, CH-8092 Zurich,
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* Attn: Systems Group.
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*/
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/*
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* omap44xx_emu_prm.dev
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*
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* DESCRIPTION:
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*
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* NOTE: This file has been automatically generated based on the
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* XML files extracted from the TI RDT v1.0.0.4p Tool.
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* Download from here: http://www.ti.com/product/omap4460
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* This means that the file might not be optimal in terms of naming
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* conventions for constants and registers (duplicated
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* namespaces in register and device name etc.).
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* Also, because of the underlying structure from the original XML
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* it's possible that some constants appear multiple times (if they
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* have slightly different descriptions for example).
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*
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* You want to clean that up before using the files for the first time!
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*/
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device omap44xx_emu_prm msbfirst ( addr base ) "" {
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constants emu_bank_onstate_status width(2) "" {
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EMU_BANK_ONSTATE_3_r = 3 "Memory bank is on when the domain is ON.";
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};
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constants powerstate_status width(2) "" {
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POWERSTATE_0_r = 0 "OFF state";
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};
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register pm_emu_pwrstctrl addr(base, 0x0) "This register controls the EMU power state to reach upon a domain sleep transition" {
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_ 14 mbz;
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emu_bank_onstate 2 ro type(emu_bank_onstate_status) "EMU memory state when domain is ON.";
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_ 14 mbz;
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powerstate 2 ro type(powerstate_status) "Power state control";
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};
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constants lastpowerstateentered_status width(2) "" {
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LASTPOWERSTATEENTERED_0_r = 0 "Power domain was previously OFF";
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LASTPOWERSTATEENTERED_1_r = 1 "Power domain was previously in RETENTION";
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LASTPOWERSTATEENTERED_2_r = 2 "Power domain was previously ON-INACTIVE";
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LASTPOWERSTATEENTERED_3_r = 3 "Power domain was previously ON-ACTIVE";
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};
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constants intransition_status width(1) "" {
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INTRANSITION_0_r = 0 "No ongoing transition on power domain";
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INTRANSITION_1_r = 1 "Power domain transition is in progress.";
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};
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constants emu_bank_statest_status width(2) "" {
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EMU_BANK_STATEST_0_r = 0 "Memory is OFF";
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EMU_BANK_STATEST_1_r = 1 "Reserved";
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EMU_BANK_STATEST_2_r = 2 "Reserved";
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EMU_BANK_STATEST_3_r = 3 "Memory is ON It is supplied by WKUP LDO";
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};
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constants logicstatest_status width(1) "" {
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LOGICSTATEST_0_r = 0 "Logic in domain is OFF";
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LOGICSTATEST_1_r = 1 "Logic in domain is ON";
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};
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constants powerstatest_status width(2) "" {
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POWERSTATEST_0_r = 0 "Power domain is OFF";
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POWERSTATEST_3_r = 3 "Power domain is ON-ACTIVE";
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};
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register pm_emu_pwrstst addr(base, 0x4) "This register provides a status on the EMU domain current power state. [warm reset insensitive]" {
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_ 6 mbz;
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lastpowerstateentered 2 rw type(lastpowerstateentered_status) "Last low power state entered. Set to 0x3 upon write of the same only. This register is intended for debug purpose only.";
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_ 3 mbz;
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intransition 1 ro type(intransition_status) "Domain transition status";
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_ 14 mbz;
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emu_bank_statest 2 ro type(emu_bank_statest_status) "EMU memory bank state status";
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_ 1 mbz;
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logicstatest 1 ro type(logicstatest_status) "Logic state status";
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powerstatest 2 ro type(powerstatest_status) "Current power state status";
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};
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constants lostmem_emu_bank_status width(1) "" {
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LOSTMEM_EMU_BANK_0 = 0 "Context has been maintained";
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LOSTMEM_EMU_BANK_1 = 1 "Context has been lost";
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};
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register rm_emu_debugss_context addr(base, 0x24) "This register contains dedicated DEBUGSS context statuses. [warm reset insensitive]" {
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_ 23 mbz;
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lostmem_emu_bank 1 rw1c type(lostmem_emu_bank_status) "Specify if memory-based context in EMU_BANK memory bank has been lost due to a previous power transition or other reset source.";
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_ 7 mbz;
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lostcontext_dff 1 rw1c type(lostmem_emu_bank_status) "Specify if DFF-based context has been lost due to a previous power transition or other reset source. (set upon assertion of EMU_RST signal)";
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};
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}; |