76 lines
3.9 KiB
Plaintext
76 lines
3.9 KiB
Plaintext
/*
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* Copyright (c) 2013 ETH Zurich. All rights reserved.
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*
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* This file is distributed under the terms in the attached LICENSE file.
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* If you do not find this file, copies can be found by writing to:
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* ETH Zurich D-INFK, CAB F.78, Universitaetstrasse 6, CH-8092 Zurich,
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* Attn: Systems Group.
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*/
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/*
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* omap44xx_always_on_prm.dev
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*
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* DESCRIPTION:
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*
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* NOTE: This file has been automatically generated based on the
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* XML files extracted from the TI RDT v1.0.0.4p Tool.
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* Download from here: http://www.ti.com/product/omap4460
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* This means that the file might not be optimal in terms of naming
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* conventions for constants and registers (duplicated
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* namespaces in register and device name etc.).
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* Also, because of the underlying structure from the original XML
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* it's possible that some constants appear multiple times (if they
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* have slightly different descriptions for example).
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*
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* You want to clean that up before using the files for the first time!
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*/
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device omap44xx_always_on_prm msbfirst ( addr base ) "" {
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constants wkupdep_sr_mpu_mpu_status width(1) "" {
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WKUPDEP_SR_MPU_MPU_1_r = 1 "Dependency is enabled";
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};
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register pm_alwon_sr_mpu_wkdep addr(base, 0x28) "This register controls wakeup dependency based on SR_MPU service requests." {
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_ 31 mbz;
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wkupdep_sr_mpu_mpu 1 ro type(wkupdep_sr_mpu_mpu_status) "Wakeup dependency from SR_MPU module (softwareakeup signal) towards MPU + L3_1 + L4_CFG domains";
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};
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constants lostcontext_dff_status width(1) "" {
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LOSTCONTEXT_DFF_0 = 0 "Context has been maintained";
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LOSTCONTEXT_DFF_1 = 1 "Context has been lost";
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};
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register rm_alwon_sr_mpu_context addr(base, 0x2C) "This register contains dedicated SR_MPU context statuses. [warm reset insensitive]" {
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_ 31 mbz;
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lostcontext_dff 1 rw1c type(lostcontext_dff_status) "Specify if DFF-based context has been lost due to a previous power transition or other reset source. (set upon assertion of Always_on_CORE_RST signal)";
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};
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constants wkupdep_sr_iva_mpu_m3_status width(1) "" {
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WKUPDEP_SR_IVA_MPU_M3_0 = 0 "Dependency is disabled";
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WKUPDEP_SR_IVA_MPU_M3_1 = 1 "Dependency is enabled";
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};
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register pm_alwon_sr_iva_wkdep addr(base, 0x30) "This register controls wakeup dependency based on SR_IVA service requests." {
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_ 30 mbz;
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wkupdep_sr_iva_mpu_m3 1 rw type(wkupdep_sr_iva_mpu_m3_status) "Wakeup dependency from SR_IVA module (softwareakeup signal) towards MPU_A3 + L3_2 + L3_1 + L4_CFG domains";
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wkupdep_sr_iva_mpu 1 rw type(wkupdep_sr_iva_mpu_m3_status) "Wakeup dependency from SR_IVA module (softwareakeup signal) towards MPU + L3_1 + L4_CFG domains";
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};
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register rm_alwon_sr_iva_context addr(base, 0x34) "This register contains dedicated SR_IVA context statuses. [warm reset insensitive]" {
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_ 31 mbz;
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lostcontext_dff 1 rw1c type(lostcontext_dff_status) "Specify if DFF-based context has been lost due to a previous power transition or other reset source. (set upon assertion of Always_on_CORE_RST signal)";
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};
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register pm_alwon_sr_core_wkdep addr(base, 0x38) "This register controls wakeup dependency based on SR_CORE service requests." {
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_ 30 mbz;
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wkupdep_sr_core_mpu_m3 1 rw type(wkupdep_sr_iva_mpu_m3_status) "Wakeup dependency from SR_CORE module (softwareakeup signal) towards MPU_A3 + L3_2 + L3_1 + L4_CFG domains";
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wkupdep_sr_core_mpu 1 rw type(wkupdep_sr_iva_mpu_m3_status) "Wakeup dependency from SR_CORE module (softwareakeup signal) towards MPU + L3_1 + L4_CFG domains";
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};
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register rm_alwon_sr_core_context addr(base, 0x3C) "This register contains dedicated SR_CORE context statuses. [warm reset insensitive]" {
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_ 31 mbz;
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lostcontext_dff 1 rw1c type(lostcontext_dff_status) "Specify if DFF-based context has been lost due to a previous power transition or other reset source. (set upon assertion of Always_on_CORE_RST signal)";
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};
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}; |