341 lines
8.7 KiB
Plaintext
341 lines
8.7 KiB
Plaintext
/*
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* Copyright (c) 2012, ETH Zurich. All rights reserved.
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*
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* This file is distributed under the terms in the attached LICENSE file.
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* If you do not find this file, copies can be found by writing to:
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* ETH Zurich D-INFK, Universitaestr. 6, CH-8092 Zurich. Attn: Systems Group.
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*/
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/*
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* ohci.dev
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*
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* DESCRIPTION: Open Host Controller Interface (OHCI) description
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*
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* Archaic USB interface, but still found on e.g. ATI and NVidia
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* chipsets.
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*
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* Numbers in comments refer to the OpenHCI Open Host Controller
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* Interface Specification for USB, by Compaq, Microsoft, and National
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* Semiconductor, 09/14/99 2:33 PM, Release: 1.0a
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*/
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device ohci lsbfirst ( io base ) "OHCI USB controller" {
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/*
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//
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// Data structures
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//
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// 4.2.1
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constants direction width(2) "Data flow direction" {
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dir_td = 0b00 "Get direction from TD";
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dir_out = 0b01 "Out";
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dir_in = 0b10 "In";
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dir_td1 = 0b11 "Get direction from TD (alt)";
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};
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datatype epdesc lsbfirst(32) "Endpoint descriptor" {
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fa 7 "Function address";
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en 4 "Endpoint number";
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d 2 type(direction) "Direction";
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s 1 "Speed (1=low, 0=full)";
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k 1 "Skip";
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f 1 "Format (1=isochronous, 0=general)";
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mps 11 "Maximum packet size";
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_ 5;
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_ 4;
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tailp 28 "TD queue tail pointer";
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h 1 "Halted";
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c 1 "Toggle carry";
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_ 2 mbz;
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headp 28 "TD queue head pointer";
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_ 4;
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nexted 28 "Next endpoint descriptor";
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};
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// 4.3.1
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constants pid width(2) "Direction / PID for token" {
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pid_setup = 0b00 "Setup (to endpoint)";
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pid_out = 0b01 "To endpoint";
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pid_in = 0b10 "From endpoint";
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};
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datatype gentd lsbfirst(32) "General transfer descriptor" {
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_ 18;
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r 1 "Buffer rounding";
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dp 2 type(pid) "Direction or PID";
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di 3 "Delay interrupt frames";
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t 2 "Data toggle";
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ec 2 "Error count";
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cc 4 type(ccode) "Condition code for last attempted transaction";
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cbp 32 "Current buffer pointer";
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_ 4 mbz;
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nexttd 28 "Next transfer descriptor";
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be 32 "Buffer end";
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};
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// 4.3.2
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datatype isotd lsbfirst(32) "Isochronous transfer descriptor" {
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sf 16 "Starting frame";
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_ 5;
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di 3 "Delay interrupt frames";
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fc 3 "Frame count";
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_ 1;
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cc 4 type(ccode) "Condition code for last attempted transaction";
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_ 12;
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bp0 20 "Buffer page 0";
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_ 5 mbz;
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nexttd 27 "Next transfer descriptor";
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be 32 "Buffer end";
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ofpsw0 16 "Offset / packet status word 0";
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ofpsw1 16 "Offset / packet status word 1";
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ofpsw2 16 "Offset / packet status word 2";
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ofpsw3 16 "Offset / packet status word 4";
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ofpsw4 16 "Offset / packet status word 3";
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ofpsw5 16 "Offset / packet status word 5";
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ofpsw6 16 "Offset / packet status word 6";
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ofpsw7 16 "Offset / packet status word 7";
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};
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datatype psw lsbfirst(16) "Packet status word" {
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size 11 "Size of packet";
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_ 1 mbz;
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cc 4 type(ccode) "Condition code";
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};
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/// 4.3.3
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constants ccode width(4) "Completion codes" {
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cc_ne = 0b0000 "No error";
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cc_crc = 0b0001 "CRC error";
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cc_bs = 0b0010 "Bitstuffing violation";
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cc_dtm = 0b0011 "Data toggle PID mismatch";
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cc_stl = 0b0100 "EP returned stall PID";
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cc_dnr = 0b0101 "Device not responding";
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cc_pcf = 0b0110 "PID check failure";
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cc_uxp = 0b0111 "Unexpected PID";
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cc_dor = 0b1000 "Data overrun";
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cc_dur = 0b1001 "Data underrun";
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cc_bor = 0b1100 "Buffer overrun";
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cc_bur = 0b1101 "Buffer underrun";
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cc_nac = 0b1110 "Not accessed";
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cc_nac_ = 0b1111 "Not accessed (alternate)";
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};
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*/
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//
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// Registers
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//
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// 7.1 Control and status partition
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//
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// 7.1.1 Interface revision
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/// Initially 0x10.
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register revision ro io(base, 0x00) "Revision" {
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rev 8 "BCD rep. of interface version";
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_ 24;
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};
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// 7.1.2 Control register
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constants state "Functional state" {
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st_reset = 0b00 "Reset (after h/w reset)";
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st_resume = 0b01 "Resume from downstream port";
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st_operational = 0b10 "Operational (running)";
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st_suspend = 0b11 "Suspend (after s/w reset)";
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};
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// Initially 0x00
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register control rw io(base, 0x04) "Control" {
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cbsr 2 "Control/bulk service ratio";
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pe 1 "Periodic list enable";
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ie 1 "Isochronous enable";
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cle 1 "Control list enable";
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ble 1 "Bulk list enable";
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hcfs 2 type(state) "Host controller functional state";
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ir 1 "Interrupt routing";
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rwc 1 "Remote wakeup connected";
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rwe 1 "Remote wakeup enabled";
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_ 21;
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};
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// 7.1.3 Command and Status
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// Initially 0x00
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register cmdstatus rw io(base, 0x08) "08 CommandStatus" {
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hcr 1 "Host controller reset";
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clf 1 "Control list filled";
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blf 1 "Bulk list filled";
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ocr 1 "Ownership change request";
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_ 12;
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soc 2 ro "Scheduling overrun count";
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_ 14;
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};
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// 7.1.4-6: Interrupt registers
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regtype interrupt "Interrupts" {
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so 1 "Scheduling overrun";
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wdh 1 "Writeback done head";
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sf 1 "Start of frame";
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rd 1 "Resume detected";
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ue 1 "Unrecoverable error";
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fno 1 "Frame number overflow";
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rhsc 1 "Root hub status change";
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_ 23;
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oc 1 "Ownership change";
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mie 1 "Master interrupt enable";
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};
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register intstatus rw io(base, 0x0C) "Interrupt status"
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type(interrupt);
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register intenable rw io(base, 0x10) "Interrupt enable"
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type(interrupt);
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register intdisable rw io(base, 0x14) "Interrupt disable"
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type(interrupt);
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//
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// 7.2 Memory pointer partition
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//
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// 7.2.1
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register hcca rw io(base, 0x18) "Host controller communication area" {
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_ 8 mbz;
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hcca 24 "Physical address";
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};
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regtype physptr "Physical address pointer" {
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_ 4 mbz;
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addr 28 "Address";
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};
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// 7.2.2.
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register period_cur ro io(base, 0x1C) "Cur. isochronous or int. ED"
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type(physptr);
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// 7.2.3
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register ctrl_head rw io(base, 0x20) "First ED of control list"
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type(physptr);
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// 7.2.4
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register ctrl_cur rw io(base, 0x24) "Current ED of control list"
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type(physptr);
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// 7.2.5
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register bulk_head rw io(base, 0x28) "First ED of bulk list"
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type(physptr);
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// 7.2.6
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register bulk_cur rw io(base, 0x2C) "Current ED of bulk list"
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type(physptr);
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// 7.2.7
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register done_head ro io(base, 0x30) "Done head pointer"
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type(physptr);
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//
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// 7.3 Frame counter partition
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//
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// 7.3.1
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register fm_interval rw io(base, 0x34) "Frame interval" {
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fi 14 "Frame interval (dflt 0x2edf)";
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_ 2;
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fsmps 15 "FS largest data packet";
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fit 1 "Frame interval toggle";
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};
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// 7.3.2
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register fm_remain ro io(base, 0x38) "Frame remaining" {
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fr 14 "Bit time remaining in current frame";
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_ 17;
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frt 1 "Frame remaining toggle";
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};
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// 7.3.3
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register fm_num ro io(base, 0x3C) "Frame number" {
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fn 16 "Frame number (16-bit counter)";
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_ 16;
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};
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// 7.3.4
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register period_start rw io(base, 0x40) "Period start" {
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ps 14 "Start time for processing periodic list";
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_ 18;
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};
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// 7.3.5
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register hclsthreshold rw io(base, 0x44) "LS threshold" {
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lst 11 "Low-speed threshold (should be 0x0628)";
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_ 21;
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};
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//
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// 7.4 Root Hub partition
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//
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// 7.4.1
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register rh_descra rw io(base, 0x48) "Root hub descriptor a" {
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ndp 8 ro "Number of downstream ports";
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psm 1 "Power switching mode";
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nps 1 "No power switching";
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dt 1 ro "Device type";
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ocpm 1 "Overcurrent protection mode";
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nocp 1 "No overcurrent protection";
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_ 11;
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potpgt 8 "Power-on to power-good time (* 2ms)";
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};
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// 7.4.2
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register rh_descrb rw io(base, 0x4C) "Root hub descriptor b" {
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dr 16 "Device removal";
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ppcm 16 "Port power control mask";
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};
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// 7.4.3
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register rh_status rw io(base, 0x50) "Root hub status" {
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lps 1 wo "Clear global power";
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oci 1 ro "Overcurrent indicator";
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_ 13;
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drwe 1 rw1c "Device remote wakeup enable";
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lpsc 1 wo "Set globl power";
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ocic 1 rw1c "Overcurrent indicator change";
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_ 13;
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crwe 1 wo "Clear remote wakeup enable";
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};
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// 7.4.4
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// Assume 256 ports at this stage; it's actually given by
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// rh_descra->ndp.
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regarray rh_portstat ro io(base, 0x54)[256] "Root hub port status" {
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ccs 1 "Current connection status";
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pes 1 "Port enable status";
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pss 1 "Port suspend status";
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poci 1 "Port overcurrent indicator";
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prs 1 "Port reset status";
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_ 3;
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pps 1 "Port power status";
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lsda 1 "Low-speed device attached";
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_ 6;
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csc 1 "Connect status change";
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pesc 1 "Port enable status change";
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pssc 1 "Port suspend status change";
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ocic 1 "Port overcurrent indicator change";
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prsc 1 "Port reset status change";
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_ 11;
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};
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regarray rh_portctrl wo also io(base, 0x54)[256] "Root hub port control" {
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cpe 1 "Clear port enable";
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spe 1 "Set port enable";
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sps 1 "Set port suspend";
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css 1 "Clear suspend status";
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spr 1 "Set port reset";
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_ 3;
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spp 1 "Set port power";
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cpp 1 "Clear port power";
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_ 6;
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csc 1 "Clear connect status change";
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pesc 1 "Clear port enable status change";
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pssc 1 "Clear port suspend status change";
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ocic 1 "Clear port overcurrent indicator change";
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prsc 1 "Clear port reset status change";
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_ 11;
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};
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};
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