275 lines
13 KiB
Plaintext
275 lines
13 KiB
Plaintext
/*
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* Copyright (c) 2013 ETH Zurich. All rights reserved.
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*
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* This file is distributed under the terms in the attached LICENSE file.
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* If you do not find this file, copies can be found by writing to:
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* ETH Zurich D-INFK, CAB F.78, Universitaetstrasse 6, CH-8092 Zurich,
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* Attn: Systems Group.
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*/
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/*
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* omap44xx_keyboard_controller.dev
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*
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* DESCRIPTION:
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*
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* NOTE: This file has been automatically generated based on the
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* XML files extracted from the TI RDT v1.0.0.4p Tool.
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* Download from here: http://www.ti.com/product/omap4460
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* This means that the file might not be optimal in terms of naming
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* conventions for constants and registers (duplicated
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* namespaces in register and device name etc.).
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* Also, because of the underlying structure from the original XML
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* it's possible that some constants appear multiple times (if they
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* have slightly different descriptions for example).
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*
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* You want to clean that up before using the files for the first time!
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*/
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device omap44xx_keyboard_controller msbfirst ( addr base ) "" {
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register kbd_revision ro addr(base, 0x0) "This register contains the IP revision code." type(uint32);
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constants clockactivity_status width(2) "" {
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CLOCKACTIVITY_0 = 0 "Functional clock can be switched off; L4 -nterface clock can be switched-off.";
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CLOCKACTIVITY_1 = 1 "Functional clock can be switched off; L4 interface clock is maintained during wake-up period.";
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CLOCKACTIVITY_2 = 2 "Functional clock is maintained during wake-up period; L4 interface clock can be switched off.";
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CLOCKACTIVITY_3 = 3 "Functional clock is maintained during wake-up period; L4 interface clock is maintained during wake-up period.";
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};
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constants emufree_status width(1) "" {
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EMUFREE_0 = 0 "The keyboard module is frozen in emulation mode (PINSUSPENDN signal active).";
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EMUFREE_1 = 1 "The keyboard module runs free, regardless of PINSUSPENDN value.";
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};
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constants idlemode_status width(2) "" {
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IDLEMODE_0 = 0 "Force-idle. An idle request is acknowledged unconditionally.";
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IDLEMODE_1 = 1 "No-idle. An idle request is never acknowledged.";
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IDLEMODE_2 = 2 "Smart-idle. Acknowledgment to an idle request is given based on the internal activity of the module.";
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IDLEMODE_3 = 3 "Reserved.Do not use.";
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};
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constants enawakeup_status width(1) "" {
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ENAWAKEUP_0 = 0 "No wake-up line assertion in idle mode";
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ENAWAKEUP_1 = 1 "Wake-up line assertion enabled in smart-idle mode";
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};
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constants softreset_status width(1) "" {
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SOFTRESET_0 = 0 "Normal mode";
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SOFTRESET_1 = 1 "The module is reset.";
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};
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constants autogating_status width(1) "" {
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AUTOGATING_0 = 0 "L4 interface clock is free-running.";
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AUTOGATING_1 = 1 "Automatic L4 interface clock gating strategy is applied, based on the L4 interface activity.";
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};
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register kbd_sysconfig addr(base, 0x10) "This register controls the various parameters of the L4 interface." {
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_ 22 mbz;
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clockactivity 2 rw type(clockactivity_status) "Clock(s) activity during wake-up mode period.";
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_ 2 mbz;
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emufree 1 rw type(emufree_status) "Emulation mode";
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idlemode 2 rw type(idlemode_status) "Power management, req/ack control";
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enawakeup 1 rw type(enawakeup_status) "Wake-up feature global control";
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softreset 1 rw type(softreset_status) "Software reset. This bit is automatically reset by the hardware. During reads, it always return 0.";
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autogating 1 rw type(autogating_status) "Internal L4 interface clock gating strategy";
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};
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constants resetdone_status width(1) "" {
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RESETDONE_0_r = 0 "Internal module reset is ongoing.";
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RESETDONE_1_r = 1 "Reset completed";
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};
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register kbd_sysstatus addr(base, 0x14) "This register controls optional features specific to the timer function." {
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_ 31 mbz;
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resetdone 1 ro type(resetdone_status) "Internal reset monitoring";
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};
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constants miss_event_status width(1) "" {
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MISS_EVENT_0 = 0 "No miss event";
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MISS_EVENT_1 = 1 "A miss event occurs.";
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};
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constants it_timeout_status width(1) "" {
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IT_TIMEOUT_0 = 0 "No time-out event";
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IT_TIMEOUT_1 = 1 "A time-out event occurs.";
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};
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constants it_long_key_status width(1) "" {
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IT_LONG_KEY_0 = 0 "No long-key event";
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IT_LONG_KEY_1 = 1 "A long-key event occurs.";
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};
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constants it_event_status width(1) "" {
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IT_EVENT_0 = 0 "No event";
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IT_EVENT_1 = 1 "An event occurs.";
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};
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register kbd_irqstatus addr(base, 0x18) "The keyboard interrupt-status register is used to determine which of the keyboard events requested an interrupt." {
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_ 28 mbz;
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miss_event 1 rw type(miss_event_status) "Indicates when a miss event occurs.";
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it_timeout 1 rw type(it_timeout_status) "Indicates when a time-out event is detected.";
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it_long_key 1 rw type(it_long_key_status) "Indicates when a long-key event is detected.";
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it_event 1 rw type(it_event_status) "Indicates when an event is detected.";
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};
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constants it_timeout_en_status width(1) "" {
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IT_TIMEOUT_EN_0 = 0 "Time-out interrupt disabled";
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IT_TIMEOUT_EN_1 = 1 "Time-out interrupt enabled";
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};
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constants it_long_key_en_status width(1) "" {
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IT_LONG_KEY_EN_0 = 0 "Long-key interrupt disabled";
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IT_LONG_KEY_EN_1 = 1 "Long-key interrupt enabled";
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};
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constants it_event_en_status width(1) "" {
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IT_EVENT_EN_0 = 0 "Event interrupt disabled";
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IT_EVENT_EN_1 = 1 "Event interrupt enabled";
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};
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register kbd_irqenable addr(base, 0x1C) "The keyboard interrupt-enable register lets the user enable certain keyboard event for generating an interrupt request." {
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_ 29 mbz;
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it_timeout_en 1 rw type(it_timeout_en_status) "Time-out interrupt enable";
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it_long_key_en 1 rw type(it_long_key_en_status) "Long-key interrupt enable";
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it_event_en 1 rw type(it_event_en_status) "Enable event interrupt";
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};
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constants wup_timeout_ena_status width(1) "" {
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WUP_TIMEOUT_ENA_0 = 0 "Time-out wake-up generation disabled";
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WUP_TIMEOUT_ENA_1 = 1 "Time-out wake-up generation enabled";
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};
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constants wup_long_key_ena_status width(1) "" {
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WUP_LONG_KEY_ENA_0 = 0 "Long-key wake-up generation disabled";
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WUP_LONG_KEY_ENA_1 = 1 "Long-key wake-up generation enabled";
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};
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constants wup_event_ena_status width(1) "" {
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WUP_EVENT_ENA_0 = 0 "Event wake-up generation disabled";
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WUP_EVENT_ENA_1 = 1 "Event wake-up generation enabled";
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};
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register kbd_wakeupenable addr(base, 0x20) "The keyboard wake-up enable register lets the user mask the expected source of wake-up event that generates a wake-up request." {
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_ 29 mbz;
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wup_timeout_ena 1 rw type(wup_timeout_ena_status) "Time-out wake-up enable";
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wup_long_key_ena 1 rw type(wup_long_key_ena_status) "Long-key wake-up enable";
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wup_event_ena 1 rw type(wup_event_ena_status) "Event wake-up enable";
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};
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constants pend_timeout_status width(1) "" {
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PEND_TIMEOUT_0_r = 0 "No write pending to the register";
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PEND_TIMEOUT_1_r = 1 "A write is pending to the register";
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};
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constants pend_long_key_status width(1) "" {
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PEND_LONG_KEY_0_r = 0 "No write pending to the register.";
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PEND_LONG_KEY_1_r = 1 "A write is pending to the register";
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};
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register kbd_pending addr(base, 0x24) "Software must read the pending write bits to ensure that following write access is not discarded due to ongoing write synchronization process." {
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_ 28 mbz;
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pend_timeout 1 ro type(pend_timeout_status) "Write-pending bit forKBD_TIMEOUT register";
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pend_long_key 1 ro type(pend_long_key_status) "Write-pending bit forKBD_KEYLONGTIME register";
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pend_debouncing 1 ro type(pend_timeout_status) "Write-pending bit forKBD_DEBOUNCINGTIME register";
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pend_ctrl 1 ro type(pend_timeout_status) "Write pending bit forKBD_CTRL register";
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};
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constants repeat_mode_status width(1) "" {
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REPEAT_MODE_0 = 0 "Repeat mode detection disabled";
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REPEAT_MODE_1 = 1 "Repeat mode detection enabled";
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};
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constants timeout_long_key_status width(1) "" {
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TIMEOUT_LONG_KEY_0 = 0 "Time-out long key mode disabled";
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TIMEOUT_LONG_KEY_1 = 1 "Time-out long key mode enabled";
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};
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constants long_key_status width(1) "" {
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LONG_KEY_0 = 0 "Long-key mode disabled";
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LONG_KEY_1 = 1 "Long-key mode enabled";
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};
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constants nsoftware_mode_status width(1) "" {
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NSOFTWARE_MODE_0 = 0 "Enable software mode.";
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NSOFTWARE_MODE_1 = 1 "Enable hardware decoding using internal sequencer.";
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};
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register kbd_ctrl addr(base, 0x28) "This register sets the functional configuration of the module." {
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_ 23 mbz;
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repeat_mode 1 rw type(repeat_mode_status) "Repeat mode enable";
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timeout_long_key 1 rw type(timeout_long_key_status) "Time-out long key mode enable";
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timeout_empty 1 rw type(timeout_long_key_status) "Time-out empty mode enable";
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long_key 1 rw type(long_key_status) "Long-key mode enable.";
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ptv 3 rw "Prescale clock timer value";
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nsoftware_mode 1 rw type(nsoftware_mode_status) "Select hardware or software mode for key decoding.";
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_ 1 mbz;
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};
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register kbd_debouncingtime addr(base, 0x2C) "This register is used to filter glitches on the press key or release key." {
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_ 26 mbz;
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debouncing_value 6 rw "This value corresponds to the desired value of debouncing time.";
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};
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register kbd_keylongtime addr(base, 0x30) "This register is used to measure duration of a key press to allow shortcut detection." {
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_ 20 mbz;
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long_key_value 12 rw "This value corresponds to the desired value of the long-key interrupt or repeat mode value.";
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};
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register kbd_timeout addr(base, 0x34) "This register is used to detect a long inactivity on the keyboard." {
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_ 16 mbz;
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timeout_value 16 rw "This value corresponds to the desired value of the time-out interrupt.";
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};
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register kbd_statemachine addr(base, 0x38) "This register indicates the state of the sequencer." {
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_ 28 mbz;
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state_machine 4 ro "The state of internal state machine. See, for details.";
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};
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register kbd_rowinputs addr(base, 0x3C) "This register stores the value of the row inputs." {
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_ 23 mbz;
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kbr_latch 9 ro "The value of the rows input.";
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};
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register kbd_columnoutputs addr(base, 0x40) "This register holds the value of the columns output." {
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_ 23 mbz;
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kbc_reg 9 rw "The value of the columns output";
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};
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register kbd_fullcode31_0 ro addr(base, 0x44) "The register codes the row 0, row 1, row 2, and row 3." type(uint32);
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register kbd_fullcode63_32 ro addr(base, 0x48) "The register codes rows 4, 5, 6, and 7." type(uint32);
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register kbd_fullcode17_0 addr(base, 0x4C) "The register codes row 0 and row 1. Row 0 is coded between bit 0 and 8; row 1 is coded between bit 24 and 16." {
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_ 7 mbz;
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row1 9 ro "A bit set to 1 indicates that the corresponding key is pressed.";
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_ 7 mbz;
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row0 9 ro "A bit set to 1 indicates that the corresponding key is pressed.";
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};
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register kbd_fullcode35_18 addr(base, 0x50) "The register codes row 2 and row 3. Row 2 is coded between bit 0 and 8; row 3 is coded between bit 24 and 16" {
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_ 7 mbz;
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row3 9 ro "A bit set to 1 indicates that the corresponding key is pressed.";
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_ 7 mbz;
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row2 9 ro "A bit set to 1 indicates that the corresponding key is pressed.";
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};
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register kbd_fullcode53_36 addr(base, 0x54) "The register codes row 4 and row 5. Row 4 is coded between bit 0 and 8; row 5 is coded between bit 24 and 16." {
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_ 7 mbz;
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row5 9 ro "A bit set to 1 indicates that the corresponding key is pressed.";
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_ 7 mbz;
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row4 9 ro "A bit set to 1 indicates that the corresponding key is pressed.";
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};
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register kbd_fullcode71_54 addr(base, 0x58) "The register codes row 6 and row 7. Row 6 is coded between bit 0 and 8; row 7 is coded between bit 24 and 16." {
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_ 7 mbz;
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row7 9 ro "A bit set to 1 indicates that the corresponding key is pressed.";
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_ 7 mbz;
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row6 9 ro "A bit set to 1 indicates that the corresponding key is pressed.";
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};
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register kbd_fullcode80_72 addr(base, 0x5C) "The register codes row 8. Row 8 is coded between bit 0 and 8." {
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_ 23 mbz;
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row8 9 ro "A bit set to 1 indicates that the corresponding key is pressed.";
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};
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}; |