151 lines
4.4 KiB
Plaintext
151 lines
4.4 KiB
Plaintext
/*
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* Copyright (c) 2012, ETH Zurich. All rights reserved.
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*
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* This file is distributed under the terms in the attached LICENSE file.
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* If you do not find this file, copies can be found by writing to:
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* ETH Zurich D-INFK, CAB F.78, Universitaetstrasse 6, CH-8092 Zurich,
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* Attn: Systems Group.
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*/
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/*
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* omap44xx_gpio.dev
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*
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* DESCRIPTION: OMAP44xx General-Purpose I/O blocks. The 4460 has 6
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* of these.
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*
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* This is derived from:
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*
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* OMAP4460 Multimedia Device Silicon Revision 1.x Technical Reference
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* Manual Version Q, in particular Section 25.6
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*
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*/
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device omap44xx_gpio msbfirst ( addr base ) "OMAP44xx Gen. Purpose I/O" {
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register revision ro addr(base, 0x0000) "IP revision number" type(uint32);
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constants idle_m width(2) "Idle mode" {
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im_force = 0x0 "Force idle";
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im_none = 0x1 "No idle";
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im_smart = 0x2 "Smart idle";
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im_smartw = 0x3 "Smart idle wakeup";
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};
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register sysconfig rw addr(base, 0x0010) "System configuration" {
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_ 27;
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idlemode 2 type(idle_m) "Idle mode";
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enawakeup 1 "Wake-up enable";
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softreset 1 "Software reset";
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autoidle 1 "OCP clock gating control";
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};
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register irqstatus_raw_0 rw addr(base, 0x0024)
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"Per-event raw interrupt status vector (1st line)" type(uint32);
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register irqstatus_raw_1 rw addr(base, 0x0028)
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"Per-event raw interrupt status vector (2nd line)" type(uint32);
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register irqstatus_0 rw addr(base, 0x002C)
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"Per-event interrupt status vector (1st line)" type(uint32);
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register irqstatus_1 rw addr(base, 0x0030)
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"Per-event interrupt status vector (2nd line)" type(uint32);
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register irqstatus_set_0 rw addr(base, 0x0034)
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"Interrupt enable set vector (1st line)" type(uint32);
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register irqstatus_set_1 rw addr(base, 0x0038)
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"Interrupt enable set vector (2nd line)" type(uint32);
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register irqstatus_clr_0 rw addr(base, 0x003C)
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"Interrupt enable clear vector (1st line)" type(uint32);
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register irqstatus_clr_1 rw addr(base, 0x0040)
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"Interrupt enable clear vector (1st line)" type(uint32);
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register irqwaken_0 rw addr(base, 0x0044)
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"Per-event wakeup enable set vector (1st line)" type(uint32);
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register irqwaken_1 rw addr(base, 0x0048)
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"Per-event wakeup enable set vector (2nd line)" type(uint32);
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register sysstatus ro addr(base, 0x0114) "System status" {
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_ 31;
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resetdone 1 "Reset is complete";
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};
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register irqstatus1 rw addr(base, 0x0118)
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"Interrupt status (legacy) for 1st line" type(uint32);
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register irqenable1 rw addr(base, 0x011C)
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"Interrupt enable (legacy) for 1st line" type(uint32);
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register wakeupenable rw addr(base, 0x0120)
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"Wake-up enable (legacy) for 1st line" type(uint32);
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register irqstatus2 rw addr(base, 0x0128)
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"Interrupt status (legacy) for 2nd line" type(uint32);
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register irqenable2 rw addr(base, 0x012C)
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"Interrupt enable (legacy) for 2nd line" type(uint32);
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register ctrl rw addr(base, 0x0130) "Control" {
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_ 29;
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gatingratio 2 "Clock gating ratio (1<<x)";
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disablemodule 1 "Disable module; gate clocks";
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};
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register oe rw addr(base, 0x0134)
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"Output enable" type(uint32);
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register datain ro addr(base, 0x0138)
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"Data input" type(uint32);
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register dataout rw addr(base, 0x013C)
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"Data output" type(uint32);
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register leveldetect0 rw addr(base, 0x0140)
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"Detect low level" type(uint32);
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register leveldetect1 rw addr(base, 0x0144)
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"Detect high level" type(uint32);
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register risingdetect rw addr(base, 0x0148)
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"Detect rising edge" type(uint32);
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register fallingdetect rw addr(base, 0x014C)
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"Detect falling edge" type(uint32);
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register debouncenable rw addr(base, 0x0150)
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"Debounce enable" type(uint32);
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register debouncingtime rw addr(base, 0x0154) "Debouncing time" {
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_ 24;
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time 8 "Debouncing time in 31us steps";
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};
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register clearirqenable1 rw addr(base, 0x0160)
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"Clear interrupt enable - legacy mode" type(uint32);
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register setirqenable1 rw addr(base, 0x0164)
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"Set interrupt enable - legacy mode" type(uint32);
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register clearirqenable2 rw addr(base, 0x0170)
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"Clear interrupt enable" type(uint32);
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register setirqenable2 rw addr(base, 0x0174)
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"Set interrupt enable" type(uint32);
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register clearwkupena rw addr(base, 0x0180)
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"Clear Wakeup enable" type(uint32);
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register setwkuena rw addr(base, 0x0184)
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"Set wakeup enable" type(uint32);
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register cleardataout rw addr(base, 0x0190)
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"Clear data out" type(uint32);
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register setdataout rw addr(base, 0x0194)
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"Set data out" type(uint32);
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};
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