22 lines
691 B
Plaintext
22 lines
691 B
Plaintext
/*
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* Copyright (c) 2016, ETH Zurich. All rights reserved.
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*
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* This file is distributed under the terms in the attached LICENSE file.
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* If you do not find this file, copies can be found by writing to:
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* ETH Zurich D-INFK, Universitaetstrasse 6, CH-8092 Zurich. Attn: Systems Group.
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*/
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/*
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* msix.dev
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*
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* DESCRIPTION: MSIx Table specification
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*
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* According to PCI Spec V3, section, 6.8.2
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*/
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device msix lsbfirst ( addr base ) "MSIx Table Structure" {
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regarray vec_control addr(base, 0x0)[2048;0x10] "Vector Control" type(uint32);
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regarray msg_data addr(base, 0x4)[2048;0x10] "Msg Data" type(uint32);
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regarray msg_addr addr(base, 0x8)[2048;0x10] "Msg Addr" type(uint64);
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};
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