116 lines
3.4 KiB
Plaintext
116 lines
3.4 KiB
Plaintext
/*
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* Copyright (c) 2007, ETH Zurich. All rights reserved.
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*
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* This file is distributed under the terms in the attached LICENSE file.
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* If you do not find this file, copies can be found by writing to:
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* ETH Zurich D-INFK, Universitaetstrasse 6, CH-8092 Zurich. Attn: Systems Group.
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*/
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/*
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* ac97_ext_audio.dev
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*
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* DESCRIPTION: AC'97 Extended Audio Register Set
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*
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* Numbers in comments refer to the Intel Audio Codec '97 specification,
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* revision 2.3 revision 1.0, April, 2002
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*/
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device ac97_ext_audio msbfirst ( io base ) "AC97 Extended Audio" {
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// 5.8.1
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constants rev_id "Revison ID" {
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r21 = 0 "Rev. 2.1 or earlier";
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r22 = 1 "Rev. 2.2";
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r23 = 2 "Rev. 2.3";
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unk = 3 "Unknown";
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};
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register eaid ro io( base, 0x28) "Extended audio id" {
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id 2 "Id";
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_ 2 rsvd;
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rev 2 type(rev_id) "Revision ID";
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amap 1 "Slot/DAC mapping support";
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ldac 1 "PCM LFE DAC support";
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sdac 1 "PCM Surround L&R DACs support";
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cdac 1 "PCM Center DAC support";
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dsa 2 rw "DAC slot assignment";
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vrm 1 "Variable rate mic support";
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spdif 1 "SPDIF transmitter support";
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dra 1 "Double-rate PCM audio support";
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vra 1 "Variable rate PCM audion support";
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};
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// 5.8.2
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register easc rw io( base, 0x2a ) "Extended audio status and control" {
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vcfg 1 "S/PDIF validity flag";
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prl 1 "MIC ADC off";
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prk 1 "PCM LFE DACs off";
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prj 1 "PCM surround DACs off";
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pri 1 "PCM center DAC off";
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spcv 1 ro "S/PDIF configuration valid";
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madc 1 ro "Mic ADC ready";
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ldac 1 ro "PCM LFE DAC ready";
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sdac 1 ro "PCM Surround L&R DACs ready";
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cdac 1 ro "PCM Center DAC ready";
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dsa 2 "DAC slot assignment";
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vrm 1 "Variable rate mic enable";
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spdif 1 "SPDIF transmitter enable";
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dra 1 "Double-rate PCM audio enable";
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vra 1 "Variable rate PCM audion enable";
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};
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// 5.8.3
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register front_sr rw io( base, 0x2c) "PCM front DAC rate" type(uint16);
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register surr_sr rw io( base, 0x2e) "PCM surround DAC rate" type(uint16);
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register lfe_sr rw io( base, 0x30) "PCM LFE DAC rate" type(uint16);
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register lr_sr rw io( base, 0x32) "PCM left/right DAC rate" type(uint16);
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register mic_sr rw io( base, 0x34) "MIC ADC rate" type(uint16);
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// 5.8.4
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register center_vc rw io( base, 0x36) "Center/LFE volume" {
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lfe_mute 1 "LFE mute";
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_ 1 rsvd;
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lfe_vol 6 "LFE volume";
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cntr_mute 1 "Center mute";
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_ 1 rsvd;
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cntr_vol 6 "Center volume";
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};
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register surr_vc rw io( base, 0x38) "Surround volume" {
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left_mute 1 "Left mute";
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_ 1 rsvd;
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left_vol 6 "Left volume";
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right_mute 1 "Right mute";
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_ 1 rsvd;
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right_vol 6 "Right volume";
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};
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// 5.8.5
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constants spdif_sr "S/PDIF sample rate" {
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sr_441 = 0 "44.1kHz";
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sr_rsvd = 0 "reserved";
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sr_48 = 0 "48kHz";
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sr_32 = 0 "32Hz";
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};
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register spdif_cntl rw io( base, 0x3a) "S/PDIF control" {
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v 1 "validity";
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drs 1 "Double rate";
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spsr 2 type(spdif_sr) "Sample rate";
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l 1 "General level";
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cc 7 "Category code";
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pre 1 "Preemphasis";
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copy 1 "Copyright";
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notaudio 1 "Non-PCM format";
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pro 1 "Professional";
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};
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// 5.8.8
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register vid1 ro io( base, 0x7c) "Vendor ID 1" {
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f 8 "First PnP vendor ID code";
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s 8 "Second PnP vendor ID code";
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};
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register vid2 ro io( base, 0x7e) "Vendor ID 2" {
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t 8 "Third PnP vendor ID code";
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dev 8 "Vendor-specific device ID";
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};
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};
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