/** * \file * \brief init process for child spawning */ /* * Copyright (c) 2007, 2008, 2009, 2010, 2016, ETH Zurich. * All rights reserved. * * This file is distributed under the terms in the attached LICENSE file. * If you do not find this file, copies can be found by writing to: * ETH Zurich D-INFK, Haldeneggsteig 4, CH-8092 Zurich. Attn: Systems Group. */ #include #include #include #include #include #include #include #include #include #include #include "mem_alloc.h" #include #include struct bootinfo *bi; coreid_t my_core_id; struct platform_info platform_info; static int bsp_main(int argc, char *argv[]) { errval_t err; // Grading grading_setup_bsp_init(argc, argv); // First argument contains the bootinfo location, if it's not set bi = (struct bootinfo*)strtol(argv[1], NULL, 10); assert(bi); err = initialize_ram_alloc(); if(err_is_fail(err)){ DEBUG_ERR(err, "initialize_ram_alloc"); } // TODO: initialize mem allocator, vspace management here err = cap_retype(cap_selfep, cap_dispatcher, 0, ObjType_EndPointLMP, 0, 1); if (err_is_fail(err)) return err; // Grading grading_test_early(); // TODO: Spawn system processes, boot second core etc. here // A URPC frame, to hold the cross-core communication channels that you // will implement in Section 7.16. struct capref urpc_frame; err = frame_alloc(&urpc_frame, RPC_URPC_FRAME_SIZE, NULL); if(err_is_fail(err)) return err_push(err, LIB_ERR_FRAME_ALLOC); struct frame_identity urpc_frame_id; err = frame_identify(urpc_frame, &urpc_frame_id); if(err_is_fail(err)) return err_push(err, LIB_ERR_CAP_IDENTIFY); // boot second core char *cpu_driver_name; switch (platform_info.platform) { case PI_PLATFORM_QEMU: cpu_driver_name = "cpu_a57_qemu"; break; case PI_PLATFORM_IMX8X: cpu_driver_name = "cpu_imx8x"; break; default: USER_PANIC("Platform not implemented"); } void *addr; paging_map_frame(get_current_paging_state(), &addr, PAGE_SIZE, urpc_frame); assert(err_is_ok(err)); *(uint8_t *)addr = 123; // memory barrier __asm volatile ( "dmb sy\n" ); cpu_idcache_wbinv_range((uintptr_t)addr, 64); // memory barrier __asm volatile ( "dmb sy\n" ); // TODO rueegges: can we get the mpid in a better way? err = coreboot(1, "boot_armv8_generic", cpu_driver_name, "init", urpc_frame_id); if (err_is_fail(err)) return err_push(err, MON_ERR_SPAWN_CORE); // err = coreboot(2, "boot_armv8_generic", cpu_driver_name, "init", urpc_frame_id); // if (err_is_fail(err)) return err_push(err, MON_ERR_SPAWN_CORE); // err = coreboot(3, "boot_armv8_generic", cpu_driver_name, "init", urpc_frame_id); // if (err_is_fail(err)) return err_push(err, MON_ERR_SPAWN_CORE); while(*(volatile uint8_t *)addr == 123){ cpu_idcache_wbinv_range((uintptr_t)addr, 64); // memory barrier __asm volatile ( "dmb sy\n" ); }; // memory barrier __asm volatile ( "dmb sy\n" ); debug_printf("Got response\n"); // Grading grading_test_late(); debug_printf("Message handler loop\n"); // Hang around struct waitset *default_ws = get_default_waitset(); while (true) { err = event_dispatch(default_ws); if (err_is_fail(err)) { DEBUG_ERR(err, "in event_dispatch"); abort(); } } return EXIT_SUCCESS; } static int app_main(int argc, char *argv[]) { errval_t err; debug_printf("[app_main]\n"); // Implement me in Milestone 5 // Remember to call // - grading_setup_app_init(..); // - grading_test_early(); // - grading_test_late(); // TODO: get the bootinfo bi = NULL; // Grading grading_setup_app_init(bi); // TODO: initialize mem allocator, vspace management here // Grading grading_test_early(); // TODO: Spawn system processes etc. here // test communication struct capref cap_urpc = { .cnode = { .croot = CPTR_ROOTCN, .cnode = CPTR_TASKCN_BASE, .level = CNODE_TYPE_OTHER, }, .slot = TASKCN_SLOT_MON_URPC }; void *addr; err = paging_map_frame(get_current_paging_state(), &addr, PAGE_SIZE, cap_urpc); if(err_is_fail(err)) { USER_PANIC_ERR(err, "failed to map urpc frame"); } assert(*(uint8_t *)addr == 123); *(uint8_t *)addr = 21; cpu_idcache_wbinv_range((uintptr_t)addr, 64); // memory barrier __asm volatile ( "dmb sy\n" ); // Grading grading_test_late(); debug_printf("Message handler loop\n"); // Hang around struct waitset *default_ws = get_default_waitset(); while (true) { err = event_dispatch(default_ws); if (err_is_fail(err)) { DEBUG_ERR(err, "in event_dispatch"); abort(); } } return EXIT_SUCCESS; } int main(int argc, char *argv[]) { errval_t err; /* obtain the core information from the kernel*/ err = invoke_kernel_get_core_id(cap_kernel, &my_core_id); if (err_is_fail(err)) { USER_PANIC_ERR(err, "failed to obtain the core id from the kernel\n"); } /* Set the core id in the disp_priv struct */ disp_set_core_id(my_core_id); /* obtain the platform information */ err = invoke_kernel_get_platform_info(cap_kernel, &platform_info); if (err_is_fail(err)) { USER_PANIC_ERR(err, "failed to obtain the platform info from the kernel\n"); } char *platform; switch (platform_info.platform) { case PI_PLATFORM_QEMU: platform = "QEMU"; break; case PI_PLATFORM_IMX8X: platform = "IMX8X"; break; default: platform = "UNKNOWN"; } debug_printf("init domain starting on core %" PRIuCOREID " (%s), invoked as:", my_core_id, platform); for (int i = 0; i < argc; i++) { printf(" %s", argv[i]); } printf("\n"); fflush(stdout); if(my_core_id == 0) return bsp_main(argc, argv); else return app_main(argc, argv); }