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Fix coreboot cache flushing.

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This commit is contained in:
Sparchatus 2022-04-25 14:44:45 +00:00
parent 8948748963
commit b66f20ae24
2 changed files with 12 additions and 3 deletions
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9
lib/aos/coreboot.c
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@ -217,7 +217,7 @@ errval_t coreboot(coreid_t mpid,
// - Get and load the CPU and boot driver binary. // - Get and load the CPU and boot driver binary.
struct mem_region * bootdriver_module = multiboot_find_module(bi, boot_driver); struct mem_region * bootdriver_module = multiboot_find_module(bi, boot_driver);
if (bootdriver_module == NULL) return LIB_ERR_COREBOOT_FIND_MODULE; if (bootdriver_module == NULL) return LIB_ERR_COREBOOT_FIND_MODULE;
struct mem_region * cpudriver_module = multiboot_find_module(bi, cpu_driver); struct mem_region * cpudriver_module = multiboot_find_module(bi, cpu_driver);
if (cpudriver_module == NULL) return LIB_ERR_COREBOOT_FIND_MODULE; if (cpudriver_module == NULL) return LIB_ERR_COREBOOT_FIND_MODULE;
@ -375,13 +375,18 @@ errval_t coreboot(coreid_t mpid,
// find cpu driver entry point // find cpu driver entry point
core_data->cpu_driver_entry = reloc_cpudriver_entry + ARMv8_KERNEL_OFFSET; core_data->cpu_driver_entry = reloc_cpudriver_entry + ARMv8_KERNEL_OFFSET;
debug_printf("[coreboot] Flush the cache\n");
// - Flush the cache. // - Flush the cache.
//memory barrier //memory barrier
__asm volatile ( __asm volatile (
"dmb sy\n" "dmb sy\n"
); );
//clean and invalidate cache //clean and invalidate cache
cpu_idcache_wbinv_range(0, VADDR_SIZE); // cpu_idcache_wbinv_range(0, VADDR_SIZE);
cpu_idcache_wbinv_range((genvaddr_t)remote_bootdriver_elf_addr, remote_bootdriver_elf_frame_id.bytes);
cpu_idcache_wbinv_range((genvaddr_t)remote_cpudriver_elf_addr, remote_cpudriver_elf_frame_id.bytes);
cpu_idcache_wbinv_range((genvaddr_t)core_data, PAGE_SIZE);
// - Call the invoke_monitor_spawn_core with the entry point // - Call the invoke_monitor_spawn_core with the entry point
// of the boot driver and pass the (physical, of course) address of the // of the boot driver and pass the (physical, of course) address of the

6
usr/init/main.c
View File

@ -81,9 +81,13 @@ bsp_main(int argc, char *argv[]) {
default: default:
USER_PANIC("Platform not implemented"); USER_PANIC("Platform not implemented");
} }
// TODO rueegges: what is the MPID of the second core? // TODO rueegges: can we get the mpid in a better way?
err = coreboot(1, "boot_armv8_generic", cpu_driver_name, "init", urpc_frame_id); err = coreboot(1, "boot_armv8_generic", cpu_driver_name, "init", urpc_frame_id);
if (err_is_fail(err)) return err_push(err, MON_ERR_SPAWN_CORE); if (err_is_fail(err)) return err_push(err, MON_ERR_SPAWN_CORE);
// err = coreboot(2, "boot_armv8_generic", cpu_driver_name, "init", urpc_frame_id);
// if (err_is_fail(err)) return err_push(err, MON_ERR_SPAWN_CORE);
// err = coreboot(3, "boot_armv8_generic", cpu_driver_name, "init", urpc_frame_id);
// if (err_is_fail(err)) return err_push(err, MON_ERR_SPAWN_CORE);
// Grading // Grading
grading_test_late(); grading_test_late();