work on shelly

This commit is contained in:
Aurel Feer 2022-05-25 12:54:57 +02:00
parent f7441cb70d
commit 5191bd83a7
5 changed files with 88 additions and 9 deletions

View File

@ -15,6 +15,7 @@
#include <spawn/argv.h>
#include <maps/imx8x_map.h>
#include <maps/qemu_map.h>
extern struct bootinfo *bi;
extern coreid_t my_core_id;
@ -508,8 +509,12 @@ errval_t spawn_load_argv(int argc, char *argv[], struct spawninfo *si,
if (strcmp(argv[0], "enet") == 0) {
arg0_base = IMX8X_ENET_BASE;
arg0_size = IMX8X_ENET_SIZE;
} else if (strcmp(argv[0], "shelly") == 0) {
arg0_base = IMX8X_UART3_BASE;
arg0_size = IMX8X_UART_SIZE;
}
//TODO: also map GIC (interrupt controller) for shelly
si->cspace_l2_cnode_argcn = NULL_CNODE;
if (arg0_base != 0) {
err = cnode_create_foreign_l2(si->cspace_l1_cnode_cap, ROOTCN_SLOT_ARGCN, &si->cspace_l2_cnode_argcn);
@ -518,6 +523,11 @@ errval_t spawn_load_argv(int argc, char *argv[], struct spawninfo *si,
.cnode = si->cspace_l2_cnode_argcn,
.slot = 0
};
char buf[256];
debug_print_cap_at_capref(buf, 256, cap_io);
debug_printf(buf);
printf("\n");
debug_printf("offset=%x\n", arg0_base - IMX8X_START_DEV_RANGE);
err = cap_retype(arg0_cap, cap_io, (arg0_base - IMX8X_START_DEV_RANGE), ObjType_DevFrame, arg0_size, 1);
if (err_is_fail(err)) return err_push(err, LIB_ERR_CAP_RETYPE);
}

View File

@ -147,6 +147,13 @@ bsp_main(int argc, char *argv[]) {
waitset_init(&urpc_to_app_ws);
thread_create(urpc_client_loop, &urpc_to_app_ws);
//spawn shell
struct spawninfo shelly_si;
domainid_t shelly_pid;
err = spawn_load_by_name("shelly", &shelly_si, &shelly_pid);
if (err_is_fail(err)) {
DEBUG_ERR(err, "when spawning shelly");
}
// Grading
grading_test_late();
@ -313,14 +320,6 @@ app_main(int argc, char *argv[]) {
// Grading
grading_test_late();
//spawn shell
struct spawninfo shelly_si;
domainid_t shelly_pid;
err = spawn_load_by_name("shelly", &shelly_si, &shelly_pid);
if (err_is_fail(err)) {
DEBUG_ERR(err, "when spawning shelly");
}
debug_printf("Message handler loop\n");
// Hang around
struct waitset *default_ws = get_default_waitset();

View File

@ -13,6 +13,7 @@
[ build application
{
target = "shelly",
cFiles = [ "shelly.c" ]
cFiles = [ "shelly.c" ],
addLibraries = [ "lpuart" ]
}
]

View File

@ -6,9 +6,60 @@
#include <stdio.h>
#include <stdlib.h>
#include <drivers/lpuart.h>
#include <drivers/gic_dist.h>
#include <maps/imx8x_map.h>
#include <maps/qemu_map.h>
#include <aos/aos.h>
#include <aos/inthandler.h>
#include "shelly.h"
static void shelly_interrupt_handler(void * arg) {
struct shelly_st shelly_s = (struct shelly_st) arg;
debug_printf("[shelly_interrupt_handler]!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!");
return;
}
int main(int argc, char *argv[])
{
errval_t err;
debug_printf("welcome to shelly!\n");
struct shelly_st shelly_s;
//afeer: map device registers
struct capref cap_arg0 = {
.cnode = cnode_arg,
.slot = 0
};
err = paging_map_frame_attr(get_current_paging_state(),
(void **) &shelly_s.dev_base, IMX8X_UART_SIZE,
cap_arg0, VREGION_FLAGS_READ_WRITE_NOCACHE);
if (err_is_fail(err)) return err;
struct gic_dist_s * gic_s;
//TODO: map gic space
err = gic_dist_init(gic_s, NULL);
if (err_is_fail(err)) USER_PANIC_ERR(err, "couln't init gic_dist interrupts");
struct lpuart_s * uart_s;
err = lpuart_init(&uart_s, shelly_s.dev_base);
if (err_is_fail(err)) {
USER_PANIC_ERR(err, "couldn't init lpuart");
}
struct capref inter_cap;
err = inthandler_alloc_dest_irq_cap(IMX8X_UART3_INT, &inter_cap);
if (err_is_fail(err)) USER_PANIC_ERR(err, "couln't alloc dest cap");
struct waitset ws = get_default_waitset()
// waitset_init(&ws);
err = inthandler_setup(inter_cap, &ws, MKCLOSURE(shelly_interrupt_handler, shelly_s));
if (err_is_fail(err)) USER_PANIC_ERR(err, "couln't setup interrupt handler");
err = gic_dist_enable_interrupt(gic_s, IMX8X_UART3_INT, 0b11111111, 0);
if (err_is_fail(err)) USER_PANIC_ERR(err, "couln't enable gic interrupts");
err = lpuart_enable_interrupt(uart_s);
if (err_is_fail(err)) USER_PANIC_ERR(err, "couln't enable lpuart interrupts");
}

18
usr/shelly/shelly.h Normal file
View File

@ -0,0 +1,18 @@
/*
* Copyright (c) 2019, ETH Zurich.
* All rights reserved.
*
* This file is distributed under the terms in the attached LICENSE file.
* If you do not find this file, copies can be found by writing to:
* ETH Zurich D-INFK, Universitaetstrasse 6, CH-8092 Zurich. Attn: Systems Group.
*/
#ifndef SHELLY_H_
#define SHELLY_H_
struct shelly_st {
void * dev_base;
size_t dev_size;
};
#endif // ndef SHELLY_H_